Living with multiple and many cores

Core Strength

Article from ADMIN 13/2013

By Douglas Eadline

As core counts increase in both CPUs and GPUs, the HPC lifestyle could become a bit more difficult.

The commodity x86 HPC market is now a multi/many-core world. From the multicore CPU to the many-core GP-GPU, the number of cores at the user's disposal has increased dramatically. The recent introduction of the Intel MIC (Xeon Phi) has added another layer of cores to the HPC mix. This change has forced a re-evaluation of HPC software and hardware and has even introduced some uncertainty in the minds of HPC practitioners.

To understand the change and realize why it was inevitable, you need to look at some of the challenges facing modern server and desktop designs. In the past, the market enjoyed constant frequency bumps, wherein each new generation of single-core processor allowed software to run faster. It was a painless and effective upgrade enjoyed at all levels of the market. This design was particularly effective in HPC because clusters were composed of single- or dual-processor (one- or two-core) nodes and a high-speed interconnect. The Message-Passing Interface (MPI) mapped efficiently onto these designs.

The increase in frequency or "megahertz march," as it was called, started to create problems when processors approached 4GHz (109Hz, or cycles per second). In simple terms, processors were getting too hot at these frequencies.

The number of transistors that could be packed in a processor die continued to increase, however. The solution offered to the market was the multicore processor. Instead of one central processor on a chip, the extra transistors could be used to add additional processing units running at lower temperatures/frequencies. Today a four-core x86 processor is common and almost the minimum found on any new desktop or server hardware.

These additional cores created several challenges for the market. In terms of mainstream software, virtually all applications needed to be "reprogrammed" to make use of the extra cores. Creating the new "parallel" code could be done in several ways. Most

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